Open License Society ______Only software can be perfect

CPA 2007 took place this year at the University of Surrey. CPA 2007 is the eighth under the name of CPA and the 30th in the series of WoTUG conferences. Although it has to some extent become a gathering of old friends all versed in the subtilities (and the power) of the CSP model, it's theme is the subject of a renewed interest. Multi-core architectures are now the talk of the day for the simple reason that Moore's law on single processor designs has come to a saturation point and multi-core designs are the only way forward. Actually, multi-core designs are already the norm in application specific designs for years. They require a very high design effort but once that's done the volumes are high. The challenge is to be able to use multi-core chips for general purpose applications and to make programming them easy. While Alan Turing was looking from the Campus' main square, CPA 2007 was the host for two eminent keynote speakers in the field. Professor Sir Tony Hoare and Professor David May. Tony Hoare is the father of CSP, the "Communicating Sequential Processes"  process algebra that introduced (together with e.g. Millner's CCS) for the first time the notion of parallel programming in a formal way. David May was the main architect of the INMOS Transputer chip that actually put the CSP model in hardware. He also developed the occam programming language fo it. Alas, while the transputer can be called a great technological succes, it failed in the market for various, mostly non-technical reasons.
Its spirit was kept alive at conferences like this on. The CSP model is also what inspired us in developing the Virtuoso RTOS and now recently the new and break-through OpenComRTOS. The difference  between the the pure, formal CSP and its sibling occam and what we developed is mostly pragmatism. Most processors were not designed for parallel procressing and the use of the C programing language is as good as mandatory. Hence OpenComRTOS embodies what we call a pragmatic (but formally developed) superset of CSP (as you find more or less in RTOS services) and you program in C using a library of services and a system generation tool. Even this community, used to low memory footprints and fast context switches, was astomished about the small memory footprint and performance  we presented during a fringe sessions. (see attached presentation)
David May unveiled in his presentation the new chip he is developing and while his text was slightly evasive, he could speak more freely as the press release was out. See e.g. the article in EE Times on the XChip. Should it be said, the company is called XMos Semiconductor as well. Dubbed "software defined silicon, the design looks like a smart blend between a general purpose multi-core chip and a highly programmable logic chip. Hence the market is truele embedded and the competion could well be FPGAs, rather than traditional microchips. The approach, with an eye on consumer type markets, is a lot more mature than the original transputer concept. It has now the formal basis of CSP but the pragmatism of the real world as well. It could well be a winner in the market. An early prototype chip is now becoming available from TSMC in 90 nm. Production chips, IP and tools are expected for 2008.